Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-12-06
2005-12-06
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S308000, C438S212000, C438S222000, C438S233000
Reexamination Certificate
active
06972231
ABSTRACT:
A Rad Hard MOSFET has a plurality of closely spaced base strips which have respective source to form invertible surface channels with the opposite sides of each of the stripes. A non-DMOS late gate oxide and overlying conductive polysilicon gate are formed after the source and base regions have been diffused. The base strips are spaced by about 0.6 microns, and the polysilicon gate stripes are about 3.2 microns wide. An enhancement region is implanted through spaced narrow window early in the process and are located in the JFET common conduction region which is later formed by and between the spaced base stripes. The device is a high voltage (greater than 25 volts) device with very low gate capacitance and very low on resistance. An early and deep (1.6 micron) P−channel implant and diffusion are formed before the main channel is formed to produce a graded body diode junction.
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International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Pham Long
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