Raised source/drain using recess etch of polysilicon

Details Raised source/drain using recess etch of polysilicon Raised source/drain using recess etch of polysilicon

1998-06-26

1999-06-22

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438683, 438649, H01L 21336

Patent

active

059151838

ABSTRACT:
A process for forming raised source/drain junctions using CMP (Chemical Mechanical Polishing) combined with a recess etch of blanket polysilicon. The raised source/drains are defined by gate conductors and by raised STI (Shallow Trench Isolation) which also reduces leakage current through the devices and improves the threshold voltage control. The process uses a salicide gate conductor, and uses conventional polysilicon deposition, CMP, and recess steps to form the raised source/drain junctions, such that it is readily implemented in commercially feasible manufacturing processes.

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