LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor in a single-transistor memory cell having a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor manufacturing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor of semiconductor device and method of manufacturi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor on an SOI substrate with a body contact and a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor processing utilizing UV-nitride removable...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor read-only memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor structure and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor that inhibits punchthrough and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with assisted-gates and ultra-shallow...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with dual metal gate structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Mos transistor with dual pocket implant

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with elevated source and drain structures and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with highly localized super halo implant

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with local channel compensation implant

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with minimal overlap between gate and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with ramped gate oxide thickness and method for m

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistor with two empty side slots on its gate and its...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistors and methods of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MOS transistors having raised source and drain and...