MOS transistor with dual metal gate structure

Details MOS transistor with dual metal gate structure MOS transistor with dual metal gate structure

1998-09-29

2000-05-23

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438283, 438299, 438585, 438587, H01L 218234

Patent

active

060665335

ABSTRACT:
A method for making a ULSI MOSFET includes depositing a high-k gate insulator on a silicon substrate and then depositing a field oxide layer over the gate insulator. The field oxide layer is masked with photoresist and the photoresist patterned to establish first gate windows, and the oxide below the windows is then etched away to establish first gate voids in the oxide. The first gate voids are filled with a first metallic gate electrode material that is suitable for establishing a gate electrode of, e.g., an N-channel MOSFET. Second gate voids are similarly made in the oxide and filled with a second gate electrode material that is suitable for establishing a gate electrode of, e.g., an P-channel MOSFET or another N-channel MOSFET having a different threshold voltage than the first MOSFET. With this structure, plural threshold design voltages are supported in a single ULSI chip that uses high-k gate insulator technology.

REFERENCES:
patent: 5824585 (1998-10-01), Wen
patent: 5858848 (1999-01-01), Gardner et al.
patent: 5960270 (1999-09-01), Misra et al.
patent: 5970331 (1999-10-01), Gardner et al.

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