Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-29
2007-05-29
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S301000, C438S199000, C438S197000, C438S299000, C438S303000, C438S217000, C438S306000, C438S305000, C438S514000, C438S527000, C257SE21336, C257SE21337, C257SE21342
Reexamination Certificate
active
11022611
ABSTRACT:
MOS transistors having a low junction capacitance between their halo regions and their source/drain extension regions and methods for manufacturing the same are disclosed. A disclosed MOS transistor includes: a semiconductor substrate of a first conductivity type; a gate insulating layer pattern and a gate on an active region of the substrate; spacers on side walls of the gate; source/drain extension regions of a second conductivity type within the substrate on opposite sides of the gate, the source/drain extension regions having a graded junction structure; halo impurity regions of the first conductivity type within the substrate under opposite edges of the gate adjacent respective ones of the source/drain extension regions; and source/drain regions of the second conductivity type within the substrate on opposite sides of the spacer.
REFERENCES:
patent: 6114211 (2000-09-01), Fulford et al.
patent: 6174778 (2001-01-01), Chen et al.
patent: 6521502 (2003-02-01), Yu
patent: 2001/0018255 (2001-08-01), Kim et al.
patent: 02-044734 (1990-02-01), None
Dongbu Electronics Co. Ltd.
Fortney Andrew D.
Lindsay Jr. Walter L.
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