LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N-channel LDMOS with buried P-type region to prevent...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N-channel metal oxide semiconductor (NMOS) driver circuit...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N-well resistor as a ballast resistor for output MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N.sub.2 O nitrided-oxide trench sidewalls and method of making i

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N/PMOS saturation current, HCE, and Vt stability by contact...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

N/PMOS saturation current, HCE, and Vt stability by contact...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

NAND flash memory cell row and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

NAND flash memory device and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

NAND flash memory devices and methods of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

NAND memory arrays and methods

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nand-structured and amorphous silicon based read-only memory dev

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nand-type flash memory device and method of forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

NAND-type flash memory devices and methods of fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nano-meter memory device and method of making the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nano-structure memory device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nanocrystal bitcell process integration for high density...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nanocrystal flash memory device and manufacturing method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nanocrystal memory with differential energy bands and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Nanoelectromechanical transistors and methods of forming same