MOS transistor read-only memory device

Details MOS transistor read-only memory device MOS transistor read-only memory device

1998-09-04

1999-06-08

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438289, 438514, H01L 218246

Patent

active

059111070

ABSTRACT:
A MOS semiconductor ROM device is provided which is capable of preventing an ion implantation region of one memory cell from overlapping into a region of an adjacent memory cell and causing a threshold voltage V.sub.T of the adjacent memory cell from rising. The device contains a semiconductor substrate, first and second linear regions, first and second interconnect lines, a first notch, and a first doping area. The first linear region is formed over the semiconductor substrate, and the second linear region is formed over the semiconductor substrate parallel to the first linear region. The first interconnect line is formed over the semiconductor substrate and is perpendicular to the first and second linear regions, and the second interconnect line is formed over the substrate parallel to the first interconnect line. The first notch is formed in the first interconnect line between the is first and second linear regions to form a narrowed portion of the first interconnect line. The first doping area is defined between the first and second linear regions and below the narrowed portion of the first interconnect line and is doped with impurities.

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