MOS transistor of semiconductor device and method of manufacturi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438301, H01L 21336

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active

060080973

ABSTRACT:
The present invention relates to a MOS transistor of semiconductor device and method of manufacturing the same and, in particular, to MOS a transistor of semiconductor device and method of manufacturing the same which can reduce asymmetry of drain current due to bias of drain current, facilitate shallow junction and reduce the area to a minimum by forming a source/drain.

REFERENCES:
patent: 4791070 (1988-12-01), Hirao et al.
patent: 5275960 (1994-01-01), Yamaguchi et al.
patent: 5486488 (1996-01-01), Kamiyama
patent: 5705420 (1998-01-01), Ema
patent: 5904516 (1999-05-01), Park
Kimura, S., et al., Short-Channel-Effect-Suppressed Sub-0.1-.mu.m Grooved-Gate MOSFET's with W Gate., Jan. 1995, pp. 94-100.
Kinmura, S. et al., Short-Channel-Effect-Suppressed sub-0.1 -micrometer Grooved-Gate MOSFET's with W Gate., pp. 94-100, Jan. 1995.

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