Integration process to increase high voltage breakdown...

Integration scheme for constrained SEG growth on poly during...

Integration scheme for enhancing capacitance of trench...

Integration scheme for fully silicided gate

Integration scheme for reducing border region morphology in...

Integration scheme for strained source/drain CMOS using...

Integration scheme method and structure for transistors...

Integration scheme to improve NMOS with poly cap while...

Integration schemes for fabricating polysilicon gate MOSFET...

Integration system via metal oxide conversion

Inter-level dielectric planarization approach for a DRAM crown c

Interconnect line selectively isolated from an underlying...

Interconnect methods and apparatus

Interconnect structure with bi-layer metal cap

Interconnecting conductive layers of memory devices

Interdigitated capacitor and method of manufacturing thereof

Interdigitated capacitor structure for use in an integrated...

Interface improvement by stress application during oxide...

Interfacial barrier layer in semiconductor devices with...

Internal ESD protection structure with contact diffusion