LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration method to enhance p+ gate activation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of a diffusion barrier layer and a counter dopant re

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of a salicide process for MOS logic devices, and a s

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of an ion implant hard mask structure into a...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of biaxial tensile strained NMOS and uniaxial...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of bipolar and CMOS devices for sub-0.1...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of high k gate dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of high K spacers for dual gate oxide channel...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of high voltage self-aligned MOS components

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of pre-S/D anneal selective nitride/oxide...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of pre-S/D anneal selective nitride/oxide...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of SAC and salicide processes by combining hard mask

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of sac and salicide processes on a chip having embed

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of silicon carbide into DRAM cell to improve...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of strained Ge into advanced CMOS technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of the borderless contact salicide process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration of two memory types on the same integrated circuit

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration process flow for flash devices with low gap fill...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Integration process on a SOI substrate of a semiconductor...