Integration of two memory types on the same integrated circuit

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S591000, C438S981000, C257S314000, C257S315000, C257S411000

Reexamination Certificate

active

06790727

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to memories and more particularly to integrated circuits utilizing two different kinds of memories.
RELATED ART
Many integrated circuits have the capability of performing a variety of different functions to achieve a particular objective. Common in this regard is a microcomputer having memory on board. In this regard it is often desirable for there to be memory which is nonvolatile so that when the power is turned off, some of the aspects that have been programmed are still present when the power is applied again. This is common in a variety of applications including portable and automotive applications. In addition to this desire for nonvolatile memory is the desire for high speed memory. Generally, these two requirements are in conflict in that the memory types that are most practical for this purpose are made differently. There is the nonvolatile memory (NVM) that has the capability of retaining the content that was programmed into the memory for long periods of time; for example 10 years. NVMs, however, are relatively slow in terms of their ability to be written. Other kinds of memory which are relatively fast, such as DRAMS, are not nonvolatile. DRAMS are advantageous because of their small size. SRAMS are desirable for certain specific applications because they are very fast but they occupy large amounts of space on the integrated circuit. For functionality it would be desirable to have DRAM and NVM on the same device. There may be SRAM as well for the specific applications that require the very highest speed. One of the difficulties in having DRAMS and nonvolatile memories on the same integrated circuit is that the processing required for the DRAMS is very different from that of nonvolatile memories. DRAMS include, as a primary component, a capacitor. This capacitor requires unique processing that is different from anything that is involved with the NVM. The result has been that it has been very uneconomical to have both DRAM and NVM on the same device.
The reason that this has been uneconomical is that there are many masking steps that are added by adding the DRAM capability to the NVM process. In addition to requiring both the processes for nonvolatile memory and DRAM, processes for logic devices also are required. The processing for the DRAM and the nonvolatile memory both add significant masking steps to the standard logic process. Nearly all of the added steps for NVM are different than those added for DRAM. So the combination of DRAM and nonvolatile memory added so many additional steps that the cost of processing and the difficulty of maintaining high yield made it uneconomical.
Thus it is seen there is a need for reducing the cost in having nonvolatile memory and high speed, high density memory in the same integrated circuit.


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Tiwari et al., “Technology and Power-Speed Trade-Offs in Quantum-dot and Nano-crystal Memory Devices,” 1997 Symposium on VLSI Technology Digest of Technical Papers, pp. 133-134.

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