Contacts for a bit line and a storage node in a...
Control methodology using optical emission spectroscopy...
Control of etch profiles during extended overetch
Control of patterned etching in semiconductor features
Controlled etching of oxides via gas phase reactions
Controlled linewidth reduction during gate pattern formation usi
Copper etch using HCI and HBr chemistry
Copper etch using HCl and HBR chemistry
Corrosion-resistant system and method for a plasma etching...
Counterbore dielectric plasma etch process particularly...
Crack stop trenches in multi-layered low-k semiconductor...
Critical dimension control for integrated circuits
Critical dimension controlled method of plasma descum for...
Crystallographic wet chemical etching of III-nitride material
CVD TiSiN barrier for copper integration
CVD TiSiN barrier for copper integration
Damage-free ashing process and system for post low-k etch
Damascene method employing composite etch stop layer
Damascene process at semiconductor substrate level
Damascene process for fabricating interconnect layers in an...