LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling

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Boundary scan circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan circuit with integrated sensor for sensing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan circuit with integrated sensor for sensing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan connector test method capable of fully...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan controller, semiconductor apparatus,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan element and communication device made by using...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan latch configuration for generalized scan designs

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan method for terminating or modifying integrated cir

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Boundary scan of integrated circuits

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan path method and system with functional and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan path method and system with functional and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan register for differential chip core

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan system with address dependent instructions

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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Boundary scan test cell circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan tester for logic devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan tester for logic devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan testing involving shared enable latches

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Boundary scan testing system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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