Boundary scan of integrated circuits

Details Boundary scan of integrated circuits Boundary scan of integrated circuits

2007-05-15

2007-05-15

Britt, Cynthia (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

10618440

ABSTRACT:
An improved 2-bit boundary scan test circuit capable of applying boundary scan test vectors to the input of the core logic of a circuit, using a multiplexer for selectively coupling the output of a boundary scan register to the input of a boundary scan register or to the input of the core logic, and a selection circuit for controlling the multiplexer to enable the coupling when test vectors are required to be applied to the core.

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patent: 5828824 (1998-10-01), Swoboda
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patent: 6266793 (2001-07-01), Mozdzen et al.
patent: 6304987 (2001-10-01), Whetsel, Jr.
patent: 6314539 (2001-11-01), Jacobson et al.
patent: 6578168 (2003-06-01), Parulkar et al.
patent: 2000111601 (2000-04-01), None
“IEEE Standard Test Access Port and Boundary-Scan Architecture” © 2001, IEEE, Inc., New York, NY, USA.

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