Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-05-14
2009-10-27
Ellis, Kevin L (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000
Reexamination Certificate
active
07610535
ABSTRACT:
Read the description file of a PCBA without determining and selecting connectors which might be relevant to boundary scan. The description file of the PCBA determines which pins of the connectors on the PCBA should correspond to the pins of a test I/O module. And use the wiring report generated by an auto test program generator to correspond the pins of the test I/O module to the pins of the connectors which are accessed by boundary scan. Thus the IC of the test I/O module would not have any unused pin between any two consecutive pins wired to the connectors of the PCBA.
REFERENCES:
patent: 5481474 (1996-01-01), Lee
patent: 5487074 (1996-01-01), Sullivan
patent: 2002/0147561 (2002-10-01), Baracat et al.
patent: 2003/0041286 (2003-02-01), Boorom et al.
patent: 2004/0037303 (2004-02-01), Joshi et al.
patent: 2005/0125709 (2005-06-01), McKim et al.
Huang Yu-Jen
Lin Chih-Hung
Ellis Kevin L
Function Research Inc.
Gandhi Dipakkumar
Hsu Winston
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