Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-31
2007-07-31
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C710S100000, C714S043000
Reexamination Certificate
active
11076478
ABSTRACT:
A boundary scan testing system may include a baseboard (102, 202), a computing module (104, 204) coupled to the baseboard, and a boundary scan test module (106, 206, 306, 406) coupled to the computing module, where the boundary scan test module is coupled to execute a boundary scan test (120, 220, 320, 420) on the computing module via a set of boundary scan instructions (114, 214) received remotely over at least one of an IP network (110, 210) and an I2C bus (211).
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“1149.6 IEEE Standard for Boundary-Scan Testing of Advanced Digital Networks”, IEEE Std 1149.6—2003, IEEE Computer Society, sponsored by the Test Technology Standards Committee, The Institute of Electrical and Electronics Engineers, Inc., New York, Apr. 17, 2003, Print: SH95084, PDF: SS95084, pp. i-132.
“IEEE Standard Test access Port and Boundary-Scan Architecture”, IEEE Std 1149.1—2001, IEEE Computer Society, sponsored by the Test Technology Standards Committee, American National Standards Institute, The Institute of Eelctrical and Electronics Engineers, Inc. New York, 2001, pp. i-200.
Halliday David J.
Lakin Steven J.
Britt Cynthia
Motorola Inc.
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