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Testing embedded circuits with the aid of a separate supply...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Testing embedded memories in an integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing embedded memory in integrated circuits such as...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing embedded memory in integrated circuits such as...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing embedded RAM blocks by employing RAM scan techniques

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing error correcting code feature in computers that do...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing frequency hopping devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing functional boundary logic at asynchronous clock...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing hard-wired IP interface signals using a soft scan chain

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing hardware components to detect hardware failures

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing high I/O integrated circuits on a low I/O tester

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing IC functional and test circuitry having separate...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing implementation suitable for built-in self-repair...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing IO timing in a delay locked system using separate...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing logic and embedded memory in parallel

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing logic associated with numerous memory cells in the word

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Testing mechanism in a semiconductor integrated circuit device u

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Testing memory units in a digital circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Testing method and apparatus assuring semiconductor device...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Testing method and apparatus for first-in first-out memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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