(N+1) input flip-flop packing with logic in FPGA architectures
1.5V bootstrapped all-N-logic true-single-phase CMOS dynamic log
2×VDD-tolerant logic circuits and a related...
2×VDD-tolerant logic circuits and a related...
2.5 volt input/output buffer circuit tolerant to 3.3 and 5...
3-state bicmos output buffer having power down capability
3.3 V to 5 V supply interface buffer
3.3 volt CMOS tri-state driver circuit capable of driving common
3D chip-stack with fuse-type through silicon via
3V/5V input buffer
4-level logic decoder
5 volt driver in a 3 volt CMOS process
5 volt tolerant I/O buffer circuit
5 Volt tolerant IO scheme using low-voltage devices
5V compliant transmission gate and the drive logic using...
5V tolerant I/O buffer
5V tolerant PCI I/O buffer on 2.5V technology
AC drive cross point adjust method and apparatus
AC powered logic circuitry
AC/DC coupling input network with low-power common-mode...