5 Volt tolerant IO scheme using low-voltage devices

Details 5 Volt tolerant IO scheme using low-voltage devices 5 Volt tolerant IO scheme using low-voltage devices

2005-02-15

2005-02-15

Le, Don (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S082000, C326S083000, C326S027000

Reexamination Certificate

active

06856168

ABSTRACT:
Systems and methods are disclosed for operating a core circuitry of an integrated circuit at a lower voltage than the coupled IO circuitry using a tolerant circuit. In one embodiment includes a voltage tolerant circuit comprising a voltage detect module adapted to detect when a voltage is sufficient to switch bias conditions without violating maximum transistor operating conditions and a comparator adapted to detect when a PAD voltage is greater than an IO power supply voltage.

REFERENCES:
patent: 5534795 (1996-07-01), Wert et al.
patent: 5543733 (1996-08-01), Mattos et al.
patent: 5721508 (1998-02-01), Rees
patent: 5825206 (1998-10-01), Krishnamurthy et al.
patent: 6018257 (2000-01-01), Hung et al.
patent: 6081412 (2000-06-01), Duncan et al.
patent: 6130556 (2000-10-01), Schmitt et al.
patent: 6265926 (2001-07-01), Wong
patent: 6388469 (2002-05-01), Hunt et al.
patent: 0 862 267 (1998-09-01), None

Affiliated with

Also associated with

Rating

5 Volt tolerant IO scheme using low-voltage devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with 5 Volt tolerant IO scheme using low-voltage devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and 5 Volt tolerant IO scheme using low-voltage devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3508239