3D chip-stack with fuse-type through silicon via

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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C327S525000

Reexamination Certificate

active

07816945

ABSTRACT:
Programmable fuse-type through silicon vias (TSVs) in silicon chips are provided with non-programmable TSVs in the same chip. The programmable fuse-type TSVs may employ a region within the TSV structure having sidewall spacers that restrict the cross-sectional conductive path of the TSV adjacent a chip surface contact pad. Application of sufficient current by programming circuitry causes electromigration of metal to create a void in the contact pad and, thus, an open circuit. Programming may be carried out by complementary circuitry on two adjacent chips in a multi-story chip stack.

REFERENCES:
patent: 6168969 (2001-01-01), Farnworth
patent: 6400008 (2002-06-01), Farnworth
patent: 7122898 (2006-10-01), Yang et al.
patent: 7317256 (2008-01-01), Williams et al.
patent: 2001/0045645 (2001-11-01), Sasaki et al.
patent: 2008/0073747 (2008-03-01), Chao et al.
patent: 2008/0079121 (2008-04-01), Han
patent: 2009/005462 (2009-08-01), None
International Application No. PCT/EP2009/065814, PCT/ISA/220 Notification of Transmittal of The International Search Report and The Written Opinion of the International Searching Authority, or the Declaration dated Apr. 3, 2010.

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