5V tolerant PCI I/O buffer on 2.5V technology

Details 5V tolerant PCI I/O buffer on 2.5V technology 5V tolerant PCI I/O buffer on 2.5V technology

1997-09-09

1999-12-21

Tokar, Michael

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 58, 326 86, 326 83, 326 81, H03K 190175, H03K 1900

Patent

active

060054131

ABSTRACT:
A tri-state input-output (I/O) buffer which includes a core terminal, a pad terminal and an enable terminal. A pad pull-down transistor and pad pull-up transistor are coupled to the pad terminal and have pull-up and pull-down control terminals, respectively. A pull-down control circuit is coupled between the core terminal and the pull-down control terminal. A pull-up control circuit is coupled between the core terminal and the pull-up control terminal. A feedback circuit is coupled between the pad terminal and the pull-up control terminal for sensing a first voltage on the pad terminal and adjusting a second voltage on the pull-up control terminal based on the sensed first voltage to reduce leakage current through the pull-up transistor when an enable signal received on the enable terminal is an inactive state.

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