P-domino output latch
P-domino output latch with accelerated evaluate path
P-domino register
P-domino register with accelerated non-charge path
P-domino register with accelerated non-charge path
Package migration for related programmable logic devices
Pad calibration circuit with on-chip resistor
Pad circuit and method for automatically adjusting gain for...
Pad driver circuit with powered down device protection
Pad system for an integrated circuit or device
Page boundary detector
Parallel antifuse routing scheme (PARS) circuit and method for f
Parallel buffer/driver configuration between data sending termin
Parallel compression test circuit of memory device
Parallel configuration method and/or architecture for PLDs...
Parallel configuration of programmable devices
Parallel configuration of programmable devices
Parallel configuration of programmable devices
Parallel interface for configuring programmable devices
Parallel interface for configuring programmable devices