Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent
1996-09-05
1998-11-17
Tokar, Michael J.
Electronic digital logic circuitry
Interface
Supply voltage level shifting
327 72, H03K 19092
Patent
active
058381686
ABSTRACT:
An input buffer capable of operating at a first power supply voltage level or a second power supply voltage level with the operating voltage level selectable during manufacture. At least one shortable transistor is disposed between the power supply voltage input and a buffer circuit which is connected between an input and an output of the buffer circuit. When the first voltage is the intended operating voltage the at least one shortable transistor is shorted. The first operating voltage level meets the requirements of a CMOS device and the second operating voltage level meets the requirements of a TTL device. The shortable transistor can be either a p-channel or an n-channel transistor and the short can be done by a metal layer short, a polysilicon short, a depletion implant, or with vias during manufacture. Transistors in the buffer circuit are sized to provide an acceptable TTL device level trip point when the input buffer is operated at 5 volts and which also provides an acceptable CMOS device level trip point when the input buffer is operated at 3 volts. Transistors in the buffer circuit are provided to turn OFF the input buffer at the direction of an external circuit.
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patent: 5543734 (1996-08-01), Volk et al.
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patent: 5654664 (1997-08-01), Park et al.
American Microsystems, Inc.
Roseen Richard
Steuber David E.
Tokar Michael J.
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