Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1997-11-24
1999-10-26
Santamauro, Jon
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 88, 326121, 327390, H03K 19096
Patent
active
059735147
ABSTRACT:
This invention presents an all-N-logic true-single-phase CMOS dynamic logic circuit for high speed operation with a low supply voltage, in which a bootstrapped circuit containing a bootstrap capacitor, an inverter and a PMOS transistor is incorporated to a conventional non-inverting N1-block.
REFERENCES:
patent: 5525916 (1996-06-01), Gu et al.
patent: 5559452 (1996-09-01), Saito
patent: 5594380 (1997-01-01), Nam
patent: 5898333 (1999-04-01), Kuo et al.
Lou et al., "A 1.5-V Full-Swing Bootstrapped CMOS Large Capacitive-Load Driver Circuit Suitable for Low-Voltage CMOS VLSI", IEEE J. of Solid-State Circuits, vol. 32, No. 1, pp. 119-121, Jan. 1997.
Kuo James B.
Lou Jea-Hong
National Science Council
Santamauro Jon
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