Tamper response system for integrated circuits
Tamper response system for integrated circuits
Tap and matched filter arrangement
Teacher-pupil flip-flop
Technique and apparatus for terminating a transmission line
Technique for efficient logic power gating with data...
Technique for improving propagation delay of low voltage to...
Technique for mitigating gate leakage during a sleep state
Technique for preconditioning I/Os during reconfiguration
Technique for preconditioning I/Os during reconfiguration
Technique for voltage level shifting in input circuitry
Technique to reduce reflections and ringing on CMOS...
Technique to reduce reflections and ringing on CMOS...
Technique to test an integrated circuit using fewer pins
Techniques for calibrating on-chip termination impedances
Techniques for calibrating on-chip termination impedances
Techniques for combining volatile and non-volatile...
Techniques for configuring programmable logic using on-chip...
Techniques for configuring programmable logic using on-chip...
Techniques for enabling a 10BT active output impedance line...