Optimization method of integrated circuit design for...
Optimization of electrical circuits
Optimization of ROM structure by splitting
Optimizing systems-on-a-chip using the dynamic critical path
Orientation optimization method of 2-pin logic cell
Overlay measurement on double patterning substrate
Packet processing validation
Parallel intrusion search in hierarchical VLSI designs with...
Pattern layout of integrated circuit
Pattern writing circuit self-diagnosis method for charged...
Performing abstraction-refinement using a...
Pipeline architecture for maximum a posteriori (MAP) decoders
Place-and-route layout method with same footprint cells
Placement and routing using inhibited overlap of expanded areas
Placement driven control set resynthesis
Placement driven routing
Placement of I/O blocks within I/O banks using an integer...
Placing complex function blocks on a programmable integrated...
Port assignment in hierarchical designs by abstracting macro...
Post-routing power supply modification for an integrated...