Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
Reexamination Certificate
2011-05-10
2011-05-10
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Layout editor
C716S055000, C716S119000, C716S132000
Reexamination Certificate
active
07941782
ABSTRACT:
In a pattern layout which includes a first device pattern having a uniformly repeated pattern group having first lines and first spaces formed parallel to one anther and uniformly arranged with constant width at a constant pitch and a non-uniformly repeated pattern group having first lines and first spaces non-uniformly arranged, and a second device pattern arranged adjacent to the end portion of the non-uniformly repeated pattern group in an arrangement direction thereof and having second lines and second spaces whose widths are larger than the widths of the first lines and first spaces of the non-uniformly repeated pattern group, at least part of the widths of the first lines and the first spaces of the non-uniformly repeated pattern group is made larger than the width of the first line or the width of the first space of the uniformly repeated pattern group.
REFERENCES:
patent: 7716617 (2010-05-01), Mashita et al.
patent: 2006-293081 (2006-10-01), None
Hashimoto Koji
Hatakeyama Kazuo
Kai Yasunobu
Mashita Hiromitsu
Mukai Hidefumi
Do Thuan
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
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