Language and templates for use in the design of...
Latch based optimization during implementation of circuit...
Layout circuit having a combined tie cell
Layout design method for a semiconductor integrated circuit
Layout design method of semiconductor integrated circuit
Layout design method of semiconductor integrated circuit...
Layout method for a chip
Layout method of semiconductor circuit, program and design...
Legalization of VLSI circuit placement with blockages using...
Logic cell configuration processing method and program
Logic circuit, logic circuit design method, logic circuit...
Logic design support system having RTL analysis means
Logic synthesis apparatus
Logic synthesis of multi-level domino asynchronous pipelines
Logic transformation and gate placement to avoid routing...