Data aligner in reconfigurable computing environment
Data aligner in reconfigurable computing environment
Debugging simulation of a circuit core using pattern...
Decision tree representation of a function
Decoder using a memory for storing state metrics...
Dedicated crossbar and barrel shifter block on programmable...
Delay analysis apparatus, delay analysis method and computer...
Delay fault test quality calculation apparatus, delay fault...
Design structure for a phase locked loop with stabilized...
Design Structure for switching digital circuit clock net...
Design tool for charge trapping memory using simulated...
Design-for-test-aware hierarchical design planning
Design-For-testability planner
Detailed placer for optimizing high density cell placement...
Determining a cycle basis of a directed graph
Determining clock skew between nodes of an integrated circuit
Deterministic system and method for generating wiring...
Developing semiconductor circuit design with conditional...
Device having programmable resources and a method of...
Directed design space exploration