Placement driven control set resynthesis

Details Placement driven control set resynthesis Placement driven control set resynthesis

2011-07-12

2011-07-12

Doan, Nghia M (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S104000, C716S116000, C716S118000, C716S119000, C716S121000, C716S123000, C716S139000

Reexamination Certificate

active

07979831

ABSTRACT:
Circuit placement for increasing circuit packing density for an integrated circuit is described. A design is synthesized and mapped. Components of the design are placed to provide a first placed design. A congestion density map is generated for the first placed design. A congestion region in the congestion density map is identified and targeted for determining if the first placed design has a control set conflict. A first circuit object associated with the control set conflict is selected and either re-placed or re-synthesized to at least diminish the control set conflict.

REFERENCES:
patent: 5619419 (1997-04-01), D'Haeseleer et al.
patent: 6792585 (2004-09-01), Ku et al.
U.S. Appl. No. 12/429,842, filed Apr. 24, 2009, Srinivasan et al.
U.S. Appl. No. 12/429,991, filed Apr. 24, 2009, Fang et al.

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