Optimization of ROM structure by splitting

Details Optimization of ROM structure by splitting Optimization of ROM structure by splitting

2009-07-20

2011-10-11

Whitmore, Stacy (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S117000, C716S135000, C711S200000, C711S206000, C711S220000, C711S221000, C365S230010, C365S230060

Reexamination Certificate

active

08037440

ABSTRACT:
A method for designing a read-only memory (ROM), and related device, includes partitioning a dataset into two or more sub-datasets that each have the same address space, but are of a smaller bit-width than the original dataset. The sub-datasets are row collapsed, and then respective memory cells for the sub-datasets are provided. The output of the memory cells provides the output of the ROM. Each memory cell includes a decoder that maps addresses to word lines based on mapping information obtained during row collapsing, and a logic array driven by the decoder that encodes the data words of the sub-dataset.

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