Packet processing validation

Details Packet processing validation Packet processing validation

2011-07-12

2011-07-12

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Logic design processing

C716S103000, C716S106000, C716S111000

Reexamination Certificate

active

07979818

ABSTRACT:
Approaches for validating a design for a packet processing circuit. A method inputs a high-level language specification of a first format of an input packet. From the input specification, a plurality of high-level input packets having the first format are generated, with each field of each input packet having a value consistent with the packet specification. The packet processing circuit is simulated using a first model with input of the high-level input packets, and a first plurality of high-level output packets are output. The high-level input packets are translated into low-level input packets. The packet processing circuit is simulated using a second model with input of the low-level input packets, and a plurality of low-level output packets are output and translated into a second plurality of high-level output packets. The first and second pluralities of high-level output packets are compared to corresponding expected output packets, and comparison results stored.

REFERENCES:
patent: 7165100 (2007-01-01), Cranor et al.
patent: 7636908 (2009-12-01), Brebner
patent: 2007/0211697 (2007-09-01), Noble
patent: 2008/0270103 (2008-10-01), Kaszynski et al.
U.S. Appl. No. 11/799,897, filed May 3, 2007, Brebner et al.
U.S. Appl. No. 11/799,860, filed May 3, 2007, Keller et al.
U.S. Appl. No. 11/799,953, filed May 3, 2007, James-Roxby al.
U.S. Appl. No. 11/799,966, filed May 3, 2007, Keller et al.
U.S. Appl. No. 11/799,898, filed May 3, 2007, Keller et al.
U.S. Appl. No. 11/818,788, filed Jun. 14, 2007, Attig et al.
U.S. Appl. No. 11/818,811, filed Jun. 14, 2007, Attig et al.
U.S. Appl. No. 11/818,792, filed Jun. 14, 2007, Brebne.
U.S. Appl. No. 11/818,722, filed Jun. 14, 2007, Brebner et al.

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