Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-03-08
2011-03-08
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S120000, C716S123000, C716S132000
Reexamination Certificate
active
07904865
ABSTRACT:
A method placing items routing wiring pursuant to integrated circuit specifications to create an integrated circuit design. Once the initially placed design is legalized, rather that just starting wiring routing, the method identifies books in the integrated circuit design which contain blocked items. The method allows the routing process to be paused temporarily, and for the items to be moved to a certain extent. This movement process is controlled (limited according to signal power output by the associated books) so that the timing of the integrated circuit design is not affected by any such “mid-routing” movement. If the books do not have any blocked items, the process continues to route wires between the items and the books. If at any point before or during the routing of the wires it is found that the books do have blocked items, the process pauses the routing of the wires and performs any number of different processes to solve the blocked item situation (unblock the blocked items).
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Bar-Joshua Michael
Tsachi Itamar
Yeger Boaz
Yifrach Shaul
Garbowski Leigh Marie
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
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