Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-08-02
2011-08-02
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
Reexamination Certificate
active
07992115
ABSTRACT:
A method of measuring overlay between a first structure and a second structure on a substrate is provided. The structures include equidistant elements, such as parallel lines, wherein the equidistant elements of the first and second structure alternate. A design width CD1of the elements of the first structure is different from a design width CD2of the elements of the second structure. The difference in design width can be used to identify measurement points having incorrectly measured overlay errors.
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Choi Yin Fong
Meessen Hieronymus Johannus Christiaan
Oorschot Dorothea Maria Christina
Quaedackers Johannes Anna
Van Der Heijden Eddy Cornelis Antonius
ASML Netherlands B.V.
Dimyan Magid
Sterne Kessler Goldstein & Fox P.L.L.C.
Whitmore Stacy
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