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Ultra-thin silicon-on-insulator and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Ultra-thin SOI MOSFET method and structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Ultra-thin-body SOI MOS transistors having recessed source...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions...
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Ultrascaled MIS transistors fabricated using...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Ultrathin SOI transistor and method of making the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Ultraviolet blocking layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Undercut and residual spacer prevention for dual stressed...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Uniaxial strain relaxation of biaxial-strained thin films...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Uniform dielectric layer and method to form same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Uniformly doped source/drain junction in a double-gate MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Unit cell layout and transfer gate design for high density DRAMs

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Universal charge port connector for electric vehicles

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Use of a grated top surface topography for capacitor structures

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a hard mask in the manufacture of a semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a metal contact structure to increase control gate coupli

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a rapid thermal anneal process to control drive current

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a selective hard mask for the integration of double...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a single mask during the formation of a transistor's...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a thin nitride spacer in a split gate embedded analog...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Use of a wet etch dip step used as part of a self-aligned...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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