Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2007-07-24
2007-07-24
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S321000, C438S926000, C438S508000
Reexamination Certificate
active
11050495
ABSTRACT:
A method of fabricating an ultrathin SOI memory transistor includes preparing a substrate, including forming an ultrathin SOI layer of the substrate; adjusting the threshold voltage of the SOI layer; depositing a layer of silicon oxide on the SOI layer; patterning and etching the silicon oxide layer to form a sacrificial oxide gate in a gate region; depositing a layer of silicon nitride and forming the silicon nitride into a silicon nitride sidewall for the sacrificial oxide gate; depositing and smoothing a layer of amorphous silicon; selectively etching the sacrificial gate oxide; growing a layer of oxide in the gate region; depositing and smoothing a second layer of amorphous silicon; patterning and etching the second layer of amorphous silicon; implanting ion to form a source region and a drain region; annealing the structure; and depositing a layer of passivation oxide.
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patent: 6352899 (2002-03-01), Sakiyama et al.
patent: 6677612 (2004-01-01), Akram
patent: 6709913 (2004-03-01), Hsu
patent: 2004/0259297 (2004-12-01), Inumiya et al.
Hsu Sheng Teng
Lee Jong-Jan
Le Dung A.
Ripma David C.
Sharp Laboratories of America Inc.
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