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Double-doped polysilicon floating gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double-doped polysilicon floating gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double-gate FET with planarized surfaces and self-aligned...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double-gate FETs (Field Effect Transistors)

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double-gate transistor formed in a thermal process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Double-gate transistor with enhanced carrier mobility

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Double-gate vertical MOSFET transistor and fabrication method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions...
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Double-side corrugated cylindrical capacitor structure of high d

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double-sided capacitor structure for a semiconductor device...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Drain and source engineering for ESD-protection transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Drain extended MOS devices with self-aligned floating region...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Drain extended MOS transistors with multiple capacitors and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Drain extension regions in low voltage lateral DMOS devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Drain leakage reduction by indium transient enchanced...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Drain-extended MOS transistors and methods for making the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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DRAM (Dynamic Random Access Memory) cells

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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DRAM access transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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DRAM and MOS transistor manufacturing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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DRAM and MOS transistor manufacturing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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DRAM arrays, vertical transistor structures, and methods of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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