Recessed gate transistor structure and method of forming the...
Recessed polysilicon gate structure for a strained silicon...
Recessed structure for shallow trench isolation and salicide pro
Recessed-gate thin-film transistor with self-aligned lightly...
Recrystallization method of polysilicon film in thin film...
Recycling of a wafer comprising a multi-layer structure...
Reduced boron diffusion by use of a pre-anneal
Reduced cap layer erosion for borderless contacts
Reduced cell-to-cell shorting for memory arrays
Reduced cell-to-cell shorting for memory arrays
Reduced channel length for a high performance CMOS transistor
Reduced channel length lightly doped drain transistor using a su
Reduced contact area of sidewall conductor
Reduced degradation of metal oxide ceramic due to diffusion...
Reduced dielectric breakdown/leakage semiconductor device...
Reduced dielectric breakdown/leakage semiconductor device...
Reduced dielectric constant spacer materials integration for...
Reduced dopant deactivation of source/drain extensions using...
Reduced hydrogen sidewall spacer oxide
Reduced mask CMOS salicided process