Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-12-26
2006-12-26
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S271000, C438S272000, C257SE21419
Reexamination Certificate
active
07153745
ABSTRACT:
Recessed gate transistor structures and methods for making the same prevent a short between a gate conductive layer formed on a non-active region and an active region by forming an insulation layer therebetween, even though a misalignment is generated in forming a gate. The method and structure reduce the capacitance between gates. The method includes forming a device isolation film for defining an active region and a non-active region, on a predetermined region of a semiconductor substrate. First and second insulation layers are formed on an entire face of the substrate. A recess is formed in a portion of the active region. A gate insulation layer is formed within the recess, and then a first gate conductive layer is formed within the recess. A second gate conductive layer is formed on the second insulation layer and the first gate conductive layer. Subsequently, source/drain regions are formed.
REFERENCES:
patent: 6153475 (2000-11-01), Hofmann et al.
patent: 6214670 (2001-04-01), Shih et al.
patent: 6498062 (2002-12-01), Durcan et al.
Cho Min-Hee
Kim Ji-Young
Lebentritt Michael
Lee Cheung
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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