Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-08-31
2008-09-02
Wilczewski, M. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S524000, C438S589000
Reexamination Certificate
active
07419858
ABSTRACT:
A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.
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R. Izawa et al., “Impact of the Gate-Drain Overlapped Devices (GOLD) for Deep Submicrometer VLSI”, IEEE Trans. Electron Devices 35, 2088 1988.
Crowder Mark A.
Kisdarjono Hidayat
Schuele Paul J.
Voutsas Apostolos T.
Law Office of Gerald Maliszewski
Maliszewski Gerald
Sharp Laboratories of America Inc.
Thomas Toniae M.
Wilczewski M.
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