Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1998-07-06
2000-01-25
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438622, 438633, H01L 2100
Patent
active
060177802
ABSTRACT:
A process for planarizing a passivation layer in order to maintain a uniform gap between the passivation layer of a bottom substrate and the top substrate of a LCD integrated circuit device is described. Semiconductor device structures in and on a semiconductor substrate wherein the semiconductor device structures are covered by an insulating layer. A metal layer is deposited and patterned to form metal lines wherein there is a gap between two of the metal lines. A passivation layer is deposited overlying the metal lines wherein the gap is not filled by the passivation layer. A layer of high density plasma oxide is deposited overlying the passivation layer and polished to leave the high density plasma oxide within the gap and to leave a planarized passivation layer surface. This will also a precise gap to be maintained in which to build the liquid crystal display material between the top substrate and the passivation layer of the bottom substrate.
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Chartered Semiconductor Manufacturing Ltd.
Lebentritt Michael S.
Niebling John F.
Pike Rosemary L.S.
Saile George O.
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