Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-15
2008-04-15
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S950000, C257SE21645
Reexamination Certificate
active
07358140
ABSTRACT:
A structure fabrication method. The method comprises providing a design structure that includes (i) a design substrate and (ii) M design normal regions on the design substrate, wherein M is a positive integer greater than 1. Next, N design sacrificial regions are added between two adjacent design normal regions of the M design normal regions, wherein N is a positive integer. Next, an actual structure is provided that includes (i) an actual substrate corresponding to the design substrate, (ii) a to-be-etched layer on the actual substrate, and (iii) a memory layer on the to-be-etched layer. Next, an edge printing process is performed on the memory layer so as to form (a) M normal memory portions aligned with the M design normal regions and (b) N sacrificial memory portions aligned with the N design sacrificial regions.
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Furukawa Toshiharu
Hakey Mark C.
Holmes Steven J.
Horak David V.
Koburger, III Charles W.
Chaudhari Chandra
International Business Machines - Corporation
Sabo William D.
Schmeiser Olsen & Watts
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