LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

MSM binary switch memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

MugFET with stub source and drain regions

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-bit memory unit and fabrication method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-bit non-volatile integrated circuit memory and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-bit non-volatile memory device and method therefor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-bit stacked-type non-volatile memory and manufacture...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Multi-channel type thin film transistor and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-component strain-inducing semiconductor regions

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-depth junction formation tailored to silicide formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-gate semiconductor device and method for forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Multi-layer gate for TFT and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer reducible sidewall process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer silicide block process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer silicon nitride deposition method for forming low ox

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer spacer technology for flash EEPROM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer spacer with inhibited recess/undercut and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layer tunneling device with a graded stoichiometry...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-layered gate for a CMOS imager

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Multi-level (4 state/2-bit) stacked gate flash memory cell