Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-06
2000-12-19
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438306, 438226, 438275, 438651, 438655, H01L 21336
Patent
active
061626899
ABSTRACT:
High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. Emdodiments include forming field oxide regions, gates, spacers, and lightly doped implants, and then depositing a layer of oxide on a substrate. The oxide layer is masked to protect portions of the oxide layer located near the gate, where it is desired to have a shallow junction, then etched to expose portions of the intended source/drain regions where the silicided contacts are to be formed. A high-dosage source/drain implant is thereafter carried out to form deep source/drain junctions with the substrate where the oxide layer has been etched away, and to form shallower junctions near the gates, where the implant must travel through the oxide layer before reaching the substrate. A layer of cobalt is thereafter deposited and silicidation is performed to form metal silicide contacts over only the deep source/drain junctions, while the cobalt on the oxide layer (i.e., above the shallower junctions) does not react to form cobalt silicide, and is thereafter removed. The present invention provides ultra-shallow source-drain junctions near the gates for improved electrical characteristics, and deeper junctions away from the gates, with cobalt silicide contacts above only the deeper junction portions to avoid junction leakage, thereby facilitating reliable device scaling.
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Besser Paul Raymond
Kepler Nick
Wang Larry
Wieczorek Karsten
Advanced Micro Devices , Inc.
Hach Jonathan
Niebling John F.
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