Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-10
2000-01-25
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438787, 438786, 438954, H01L 218242
Patent
active
060177918
ABSTRACT:
A method for forming a silicon nitride/silicon oxide (NO) layer within a microelectronics fabrication, and the microelectronics fabrication having the silicon nitride/silicon oxide (NO) layer formed therein. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a first silicon nitride layer through a first deposition method. There is then formed upon the first silicon nitride layer a second silicon nitride layer through a second deposition method. Finally, there is annealed thermally in an oxidizing environment the first silicon nitride layer and the second silicon nitride layer to form therefrom a silicon nitride/silicon oxide (NO) layer. The silicon nitride/silicon oxide (NO) layer may be formed with optimized resistivity properties at a reduced thermal annealing temperature and/or a reduced thermal annealing exposure time in comparison with an otherwise equivalent silicon nitride/silicon oxide (NO) layer formed through thermal annealing a single silicon nitride layer of thickness equivalent to the thickness of the first silicon nitride layer plus the thickness of the second silicon nitride layer. When formed upon a silicon oxide dielectric layer in turn formed upon a first capacitor plate within a capacitor within an integrated circuit, there may be formed employing the silicon nitride/silicon oxide (NO) layer a silicon oxide/silicon nitride/silicon oxide (ONO) capacitive dielectric layer.
REFERENCES:
patent: 4448633 (1984-05-01), Shuskus
patent: 4577390 (1986-03-01), Haken
patent: 4746630 (1988-05-01), Hui et al.
patent: 5091327 (1992-02-01), Bergemont
patent: 5521112 (1996-05-01), Tseng
patent: 5792688 (1998-08-01), Tseng
patent: 5793075 (1998-08-01), Alsmeier et al.
patent: 5824560 (1998-10-01), Van Der Wel et al.
patent: 5907183 (1999-05-01), Takeuchi
patent: 5926719 (1999-07-01), Sung
patent: 5930624 (1999-07-01), Murata et al.
patent: 5945711 (1999-08-01), Takemura et al.
Cheng Kuo-Hsien
Wang Chen-Jong
Yoo Chue-San
Ackerman Stephen B.
Chang Joni
Hullinger Robert A.
Saile George O.
Szecsy Alek P.
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