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Low voltage high performance semiconductor devices and methods

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low voltage junction and high voltage junction optimization for

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low voltage power MOSFET device and process for its manufacture

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low voltage programmable and erasable flash EEPROM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low voltage programmable and erasable flash EEPROM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low voltage superjunction MOSFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-capacitance contact for long gate-length devices with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Low-cost high-performance planar back-gate CMOS

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-GIDL MOSFET structure and method for fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-K gate spacers by fluorine implantation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Low-K spacer structure for flash memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-leakage transistor and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-power multiple-channel fully depleted quantum well CMOSFETs

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
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Low-resistance gate transistor and method for fabricating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-stress method of fabricating field-effect transistors having

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Low-temperature grown high quality ultra-thin CoTiO3 gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-temperature grown high quality ultra-thin CoTiO3 gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-temperature polysilicon thin film transistor having...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-temperature post-dopant activation process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Low-thermal-budget gapfill process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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