Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-12
2007-06-12
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S270000, C257SE21413, C257SE21629, C257SE21652, C257SE21643
Reexamination Certificate
active
10846893
ABSTRACT:
A trench type power MOSFET has a thin vertical gate oxide along its side walls and a thickened oxide with a rounded bottom at the bottom of the trench to provide a low RDSONand increased VDSMAXand VGSMAXand a reduced Miller capacitance. The walls of the trench are first lined with nitride to permit the growth of the thick bottom oxide to, for example 1000 Å to 1400 Å and the nitride is subsequently removed and a thin oxide, for example 320 Å is regrown on the side walls. In another embodiment, the trench bottom in amorphized and the trench walls are left as single crystal silicon so that oxide can be grown much faster and thicker on the trench bottom than on the trench walls during an oxide growth step. A reduced channel length of about 0.7 microns is used. The source diffusion is made deeper than the implant damage depth so that the full 0.7 micron channel is along undamaged silicon. A very lightly doped diffusion of 1000 Å to 2000 Å in depth could also be formed around the bottom of the trench and is depleted at all times by the inherent junction voltage to further reduce Miller capacitance and switching loss.
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Fourson George
International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
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