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Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of integrated circuit structure using one or more...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of junctions by diffusion from a doped amorphous...

Utility Patent

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of junctions by diffusion from a doped film at...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of junctions by diffusion from a doped film into and t

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of laterally diffused metal-oxide semiconductor...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of low resistance, ultra shallow LDD junctions employi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of low thermal budget shallow abrupt junctions for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of memory cells and select gates of NAND memory...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of metal gate electrode using rare earth alloy...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of non-volatile memory device comprised of an...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of novel DRAM cell capacitors by integration of capaci

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of out-diffused bitline by laser anneal

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of out-diffused bitline by laser anneal

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of oxynitride and polysilicon layers in a single react

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of patterned silicon-on-insulator...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Formation of planar strained layers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of removable shroud by anisotropic plasma etch

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of self-aligned buried strap connector

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Formation of self-aligned capacitor contact module in stacked cy