Damascene process for forming ultra-shallow source/drain extensi

Details Damascene process for forming ultra-shallow source/drain extensi Damascene process for forming ultra-shallow source/drain extensi

1998-11-06

1999-11-16

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438183, 438303, 438305, H01L 21336

Patent

active

059857269

ABSTRACT:
A method of fabricating an integrated circuit with ultra-shallow source/drain junctions utilizes a dummy or sacrificial gate structure. Dopants are provided through the openings associated with sacrificial spacers to form the source and drain extensions. The openings can be filled with spacers The process can be utilized for P-channel or N-channel metal oxide field semiconductor effect transistors (MOSFETS).

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