Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-10-18
2005-10-18
Booth, Richard A. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06955963
ABSTRACT:
An electronic memory having a source (118) and a drain (120) comprising on a substrate (100) a floating gate (260) and a control gate (264).According to the invention, the floating gate (260) has a substantially U-shaped cross-section defining a space within which the control gate (264) is arranged.
REFERENCES:
patent: 5801415 (1998-09-01), Lee et al.
patent: 5856225 (1999-01-01), Lee et al.
patent: 5960270 (1999-09-01), Misra et al.
patent: 6002151 (1999-12-01), Wollesen et al.
patent: 6159796 (2000-12-01), Dietz et al.
patent: 2001/0002712 (2001-06-01), Horiguchi et al.
patent: 196 39 026 (1998-04-01), None
patent: 197 32 870 (1999-02-01), None
patent: 2 757 312 (1998-06-01), None
patent: 08 204032 (1996-08-01), None
Deleonibus Simon
Guillaumot Bernard
Booth Richard A.
Commissariat a l 'Energie Atomique
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
STMicroelectronics S.A.
LandOfFree
Damascene architecture electronic storage and method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Damascene architecture electronic storage and method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Damascene architecture electronic storage and method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3469120